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- Mechanical thinning for chip backside and local analysis
- Local exposure on flexible boards: observing fine traces and connections
- MIP Adhesive Removal: Organic Resistor Coatings and the DOE Window
- Encap and solder-mask removal: board-level target preparation
- Plasma-only decapsulation: staged records from two samples
- Selective opening and masking: access the target region
- MIP Plasma Applications in Multilayer-Package and Memory-Chip Decapsulation
- 3D package decapsulation: underfill removal with MIP plasma
- Flip-chip micro-short analysis: plasma decapsulation and local grinding
- Thin aluminum layers: attention to sensitive metal surfaces
- High-Tg packages: evaluating complex molding compounds
- EOS carbonization: preserving clues in the failure region
- SiP Decapsulation: MIP Plasma and Passive Component Protection
Technical Articles
News
- IDECAP at ICEPT 2026: Decapsulation and Delayering for Multi-layer Packages
- IDECAP at IPFA 2026: MIP Plasma Decapsulation for Sensitive Structures
- IDECAP at SEMICON China 2026: Connecting Decapsulation with Industry Needs
- IDECAP at EPTC 2025: Decapsulation for Heterogeneous Integration
- IDECAP at CPRIM 2025: Sample Preparation for Interconnect Reliability
- IDECAP at ICEPT 2025: Decapsulation for Advanced Packages
- IDECAP at IPFA 2025: From Fault Localization to Targeted Decapsulation
- IDECAP at IPFA 2024: Our First Step into the IPFA Community