iMech Pro / Precision mechanical preparation

Mechanical thinning for chip backside and local analysis

iMech Pro application images illustrate chip backside thinning, with a process path combining height measurement, leveling, visual positioning and suitable remaining-silicon-thickness metrology.

Mechanical thinning for chip backside and local analysis

Sample and analysis objective

Mechanical thinning must achieve the thickness and surface condition needed for downstream analysis while controlling local tilt, contact load and edge effects.

ItemCase information
Application directionChip backside and local silicon thinning
Process controlHeight measurement, leveling, positioning and layered removal
Thickness verificationRST measures remaining silicon thickness; confirm suitability for the actual material and configuration

Processing record

The source labels this a wafer-thinning application example. The image shows a chip region within a package and does not establish full-wafer processing dimensions or thickness-uniformity performance.

Actual sample images

Actual chip-thinning image from the iMech Pro application material.
Actual chip-thinning image from the iMech Pro application material.

Result review priorities

  • Define initial thickness, target thickness and permissible local variation.
  • Evaluate axis resolution, nominal equipment accuracy and actual sample results separately.
  • In addition to thickness, inspect surfaces, edges, flatness and downstream analytical usability.

Explore related processes and equipment →

← Back to cases
LET’S TALK

Every solution starts with a sample.

Tell us about the package, your analysis objective and the structures to preserve. Together, we can define a suitable decapsulation process.

Application image preview